terawins T101A

terawins T101A,第1张

terawins T101A

The T101A is a highly integrated All-in-one Visual Processor that provides major cost saving soluTIon for the portable applicaTIons. T101A has built-in high performance Triple ADCs, TCON, Scaling Machine with sophisTIcated upscaling and downscaling algorithms. The innovaTIve integrated  “Frame-Buffer-Less” De-interlacer can significantly reduce system cost. The T101A also integrates On Screen Display engine with 3K-DW of font RAM. The device can interface to an external micro-controller through 2-wire serial bus interface

Application

  • Portable AV system
  • Portable TV set
  • Progressive Car TV set

Features

  • Integrates 9-bit Triple Analog to Digital Converters (ADC) & Phase Locked Loop (PLL)
  • Scaler supports 2-D adaptive intra-field de-interlacer and non-linear 16:9 aspect ratio.
  • Built-in Pre-amp, mid-level & ground clamp circuit
  • Automatic Clamp Control for CVBS, Y and C
  • Max Input configuration up to 9xCVBS, 3xS-video and 3xCVBS, 3xYPbPr
  • Separate Luminance and Chroma Enhancer supports
    -Y-DLTI, Black Level Expansion, Contrast and Brightness adjustment
    -C- Supports DCTI, Saturation and Hue adjustment.
  • 2.5v & 3.3V operating voltage
  • Color Management
    -YcbCr-to-RGB Color Space Converter
    -RGB Gamma Correction
    -Dithering engine converts
    RGB888 to RGB777
    RGB888 to RGB666
    RGB888 to RGB555
    RGB888 to RGB444
  • Built-in On Screen Display Engine
    - 3K-word OSD SRAM memory
    - Supports font or bitmap modes
    - Supports character blinking, overlay, shadow and border functions
    - Fully programmable character mapping
    - Supports alpha blending & Zoom-in/Zoom-out function
    - Optional fonts can be stored in off-chip serial EEPROM
  • Flexible Data Output Formatting
    -Four software configurable output modes:
  • 8-bit mode = SerialRGB &1pixel/3clocks
  • 18-bit mode = R6G6B6 & 1 pixel/clock
  • 24-bit mode = R8G8B8 & 1 pixel/clock
  • Progressive or Interlaced 24-bit 4:4:4 YCbCr mode
  • Complex output data bits swap, reverse, re-direct capability to reduce PCB layout work
  • Selectable LVDS output data re-mapping
  • Direct interface to a (27.0MHz) Crystal
  • Supports 2-wire (normal speed) or 4-wire (high speed) modes
  • Pulse Width Modulation Outputs
  • Package: 100-pin PQFP or 100-pin TQFP

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