因特尔Cyclone 10 LP FPGA评估板电路图集及PCB装配图_技术

　　The Intel® Cyclone® 10 LP FPGAs are opTImized for low cost and low staTIc power，making them ideal for high-volume and cost-sensiTIve applicaTIons.

　　Cyclone 10 LP devices provide a high density sea of programmable gates， on-board resources， and general purpose I/Os. These resources satisfies the requirements of I/O expansion and chip-to-chip interfacing. The Cyclone 10 LP architecture suits smart and connected end applications across many market segments：

　　• Industrial and automotive

　　• Broadcast， wireline， and wireless

　　• Compute and storage

　　• Government， military， and aerospace

　　• Medical， consumer， and smart energy

　　Cyclone 10 LP FPGA系列主要特性：

图1.Cyclone 10 LP FPGA系列LE框图

图2.Cyclone 10 LP FPGA系列架构图

The logic and routing core fabric sea of gates is surrounded on each side by I/O elements, with a phase-locked loop (PLLs) in each corner. Embedded memory blocks (M9K) and 18 x 18 bit multipliers blocks are arranged in vertical columns.

The architecture also includes highly efficient interconnect and low-skew clock networks, providing connectivity between logic structures for clock and data signals.

Cyclone 10 LP FPGA系列应用:

Intel Cyclone 10 LP FPGAs are ideal for cost-sensitive applications that require increasing lower static power as the need for scalable processing acceleration increases system interface requirements.
Typical end market examples include:
I/O expansion
Interfacing
Bridging
Sensor fusion
Industrial motor control

Intel Cyclone 10 LP FPGA评估板

The Intel® Cyclone® 10 LP Evaluation Kit provides an easy-to-use platform for evaluating the performance and features of the Intel Cyclone 10 LP FPGA device.The evaluation kit includes a RoHS and CE compliant Intel Cyclone 10 LP FPGA Evaluation Board with the following components.

图3.Intel Cyclone 10 LP FPGA评估板外形图

Intel Cyclone 10 LP FPGA评估板特性器件:

• Intel Cyclone 10 LP FPGA (10CL025, U256 package)
• Enpirion® EN5329QI/EN5339QI - 2A/3A PowerSoC Low Profile Synchronous Buck
DC-DC Converter with Integrated Inductor
• Enpirion EP5358xUI 600 mA PowerSoC DC-DC Step-Down Converters with
Integrated Inductor
• Intel XWAY PHY11G Gigabit Ethernet PHY PEF7071
• Intel MAX® 10 FPGA 10M08SAU169C8G (Embedded Intel FPGA Download Cable II
and System Management)
Programming and Configuration
• Embedded Intel FPGA Download Cable II (JTAG)
• Optional JTAG direct via 10-pin header
• Active Serial x1 configuration from EPCQ flash
Memory Devices
• 128 Mb 8-bit HyperRAM with HBMC (Hyperbus Memory Controller) IP provided by
Synaptic Labs
• 64 Mb EPCQ Flash
Communication Ports
• One Gigabit Ethernet (GbE) RJ-45 port
• One 2x20 GPIO Expansion Header
• One Arduino UNO R3 type connectors
• One 12-pin DigilentPmod compatible connector
Clock Circuits
• Silicon Labs Si510 50 MHz crystal oscillator
• Silicon Labs Si5351 clock generator with programmable frequency GUI
Power Supply
• USB Y-cable (USB Type-A to mini Type-B) for both on-board Intel FPGA Download
Cable II and 5V power supply from USB port
• Supplemental 5V DC power adaptor option (5V power adaptor and cord are not
included in the kit)
Intel Quartus® Prime Standard Edition / Lite Edition
Intel Quartus® Prime Standard Edition / Lite Edition software can be downloaded from
the Download Center at the Intel FPGA website.
Recommended Operating Conditions
• Recommended ambient operating temperature range: 0C to 45C
• Maximum VCCINT current: 0.6 A