Low Power概念介绍-Voltage Area

随着智能手机，以及物联网的普及，芯片功耗的问题最近几年得到了越来越多的重视。为了实现集成电路的低功耗设计目标，我们需要在系统设计阶段就采用低功耗设计的方案。而且，随着设计流程的逐步推进，到了芯片后端设计阶段，降低芯片功耗的方法已经很少了，节省的功耗百分比也不断下降。

芯片的功耗主要由 静态功耗 （static leakage power）和 动态功耗( dynamic power)构成。静态功耗主要是指电路处于等待或者不激活状态时的泄漏电流所产生的功耗，主要是有反偏二极管泄漏电流，门栅感应漏极泄漏电流，亚阈值泄漏电流和门栅泄漏电流。动态功耗是指晶体管处于跳变状态所产生的功耗，主要由动态开关电流引起的动态开关功耗以及短路电流产生的短路功耗两部分组成。这些概念自己去看下参考书吧，不细展开了。

那我们来学一下，在数字后端阶段，有哪些方案可以降低上述功耗。

第一种方案就是 多电源多电压 技术， Multi supply Multi Voltage（MSMV） 。这是一种可以有效降低动态功耗的技术。芯片可以划分为不同 电压域 （Voltage Area），也被称为Power Domain，不同逻辑模块处于不同的电源域中，由不同电源供电。高性能的部分在高电压域，低性能要求的部分就分配在低电压域。举例来说，一个SOC芯片中，CPU应该工作在尽可能高的时钟，则它的电压应该是最高电压；而外设中的USB模块，有协议定义的固定速率，则只要分配给能满足要求的工作电压即可；一些平时不工作的模块甚至可以将电压关断（Power Gating），也就可使功耗趋于0。这样一个芯片中，就会划分为各种不同的电压域。

那我们如何创建 Voltage Area 呢？

首先，我们需要有一个统一的功耗约束文件，这边以 UPF 来配合介绍，该文件可以实现在前端门级网表到最后逻辑验证等整个芯片开发过程的贯通使用。命令不多，比较好学。接下来几篇文章，大家一起和我配合着 UPF 文件来学习下Low Power知识。

比如说我们要实现如下一个简单的MSMV设计，VA1和VA2两个不同的Voltage Area以及defalut的VA_top。

1. 首先定义Voltage Area的信息

create_power_domain VA_top –include_scope default voltage area

create_power_domain VA1 –elements iAVA1

create_power_domain VA2 –elements iBVA2

2. 创建default voltage area上供电连接关系

create_supply_net VDD创建supply net VDD

create_supply_port VDD创建supply port VDD

connect_supply_net VDD -port VDD   将VDD net和VDD port在逻辑上关联

create_supply_net VDD1创建supply net VDD1

create_supply_port VDD1创建supply port VDD1

connect_supply_net VDD1 -port VDD1   将VDD1 net和VDD1 port在逻辑上关联

create_supply_net VSS创建supply net VSS

create_supply_port VSS创建supply port VSS

connect_supply_net VSS -port VSS   将VSS net和VSS port在逻辑上关联

3.  创建VA1和VA2 voltage area中的供电连接关系

create_supply_port VDD_sw –domain VA1

create_supply_port VDD1_sw –domain VA2

create_supply_port VSS -reuse –domain VA2

create_supply_port VSS -reuse –domain VA1

create_supply_net VDD_sw –domain VA1

create_supply_net VDD1_sw –domain VA2

create_supply_net VSS-reuse –domain VA1

create_supply_net VSS-reuse –domain VA2

connect_supply_net VDD_sw –ports VDD_sw –domain VA1

connect_supply_net VDD1_sw –ports VDD1_sw –domain VA2

connect_supply_net VSS –ports VSS –domain VA1

connect_supply_net VSS –ports VSS –domain VA2

4.  创建供电集合，关联到Voltage Area

create_supply_set ss_top \ default voltage area set

  -function {power VDD} \

  -function {ground VSS} 

create_supply_set ss_pd1 \VA1 set

  -function {power VDD_sw} \

  -function {ground VSS} 

create_supply_set ss_pd2 \VA2 set

  -function {power VDD1_sw} \

  -function {ground VSS} 

associate_supply_set ss_top \

     -handle VA_top.primary

associate_supply_set ss_pd1 \

     -handle VA1.primary

associate_supply_set ss_pd2 \

     -handle VA2.primary

到这边，一个UPF文件中关于voltage area的定义就好了，当我们读入UPF文件以后，并定义好voltage area的形状以后，在GUI上，我们就可以看到voltage area的样子了。

原文链接：https://mp.weixin.qq.com/s?__biz=MzI1MzAyNTA1Mg==&mid=2652112845&idx=2&sn=772670ecc2f225b4644193f95a761a09&chksm=f23a69bec54de0a80b856637ba34effca76a8f44bd860228e1f4478e028e92515ed52d1fb0e8&scene=21#wechat_redirect

Also known as laser diode laser diode (LD). Into the 1980s, it absorbed the physical development of the semiconductor up-to-date results, the use of quantum well (QW) and strained quantum well (SL-QW) structures, such as novelty, the introduction of the refractive index modulation Bragg launchers, as well as to enhance Bragg modulation transmitter The latest technology, as well as the development of the MBE, MOCVD and the CBE, such as crystal growth technology of the new technology, making new epitaxial growth technology to precisely control crystal growth to the accuracy of atomic layer thick, high-quality growth of quantum wells, as well as strained quantum well materials. As a result, production of the LD, the current threshold of a significant decline in conversion efficiency has been greatly improved the power output doubled, significantly longer service life.

A low-power LD

In the field of information technology for the rapid development of low-power LD. For example, for fiber-optic communications and optical switching systems distributed feedback (DFB) and the dynamic single-mode LD, narrow linewidth tunable DFB-LD, such as CD-ROM for information processing technology in the field of visible light Wavelength (such as wavelength of 670nm, 650nm, 630nm The blue-green to red) LD, surface-emitting quantum well, as well as ultra-short laser pulses substantive, which are all treated the development of LD. The development of these devices are: narrow-linewidth single-frequency, high-speed, as well as short-wavelength tunable optical and integrated single-chip, and so on.

B high-power LD

In 1983, a single wavelength of 800nm output power LD more than 100mW, to 1989, 0.1mm-wide LD be reached 3.7W continuous output, and 1cm linear array LD has reached 76W output, the conversion efficiency of 39%. In 1992, the Americans also targets to a new level: 1cm linear array LD CW output power up to 121W, the conversion efficiency of 45%. Now, the output power of 120W, 1500W, 3kW and many other high-power LD have been published. High-efficiency, high power LD array and its rapid development for all-solid-state laser, diode laser that is pumped (LDP) of the rapid development of solid-state laser provides strong.

In recent years, in order to adapt to the EDFA and the EDFL, and other needs of the wavelength of 980nm high-power LD is that there is great development. Fiber Bragg Grating with recently selected frequency for filtering, a significant improvement in the stability of its output, pump effectively improve the efficiency.

And the characteristics of the application: semiconductor diode laser is the most important practical for a class of lasers. Its small size, long life, and a simple injection of current-pumped his way to work with the voltage and current circuit-compatible, which can be integrated with a single. And also can be as high as GHz frequency modulation direct current for high-speed modulation of laser output. As a result of these advantages, the semiconductor diode laser in the laser communications, optical storage, optical gyros, laser printing, as well as radar range, and so on, as well as access to a wide range of applications.

今天要介绍的Low Power概念是 Isolation cell （隔离单元），通常用于电源关断技术（PSO）和多电源多电压技术（MSMV）。起到不同电压域之间的电压钳制和隔离作用。

为什么需要Isolation cell？看下面这图：

当左边的Voltage Area处于关断状态，右边的Voltage Area却始终处于开启状态，左边的PD关断使电路输出悬空，处于未知状态X，则PMOS管和NMOS管可能同时导通，造成器件短路。

通常Isolation cell和Level Shifter一起连用，AND和OR门都可以组成一个isolation cell。Isolation可以放在input端，output端或者第三方Voltage Area中，但是考虑到power-on rail的走线，isolation cell自身的功耗，一般还是放在input端比较好，因为放在input端不需要always-on的power。

结合图表来看UPF文件描述：

set_isolation iso_va1 \ 指定isolation cell的添加rule，相当于前缀名称

       -domain VA1 \     指定添加isolation cell的voltage area

       -applies_to output \    指定isolation cell在 voltage area 的input还是output

       -diff_supply_only true\   指定cell port上是否允许有其他supply

       -loacation parent \     指定level shifter的放置位置，parent代表放在driver pin的父module

       -isolation_signal ip/iso_en1\   指定isolation cell的isolation 控制信号

      -calmp_value 1   指定isolation cell的输出值

set_isolation iso_va2 \

       -domain VA2\

       -applies_to output \

       -loacation parent \

       -sink ss_pd1 

       -isolation_signal iP/iso_en2\

       -clamp_value1

原文链接：https://mp.weixin.qq.com/s?__biz=MzI1MzAyNTA1Mg==&mid=2652112876&idx=3&sn=03e4161b9f9c8f7b7740ee7efe8e65a1&chksm=f23a699fc54de089b8829af65f23b1a02470f81a3ef349fc272d9b678cfbcf0099c468b2ed78&scene=21#wechat_redirect

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