安华高s3988芯片是不是跟原相3310芯片一样

安华高s3988芯片是不是跟原相3310芯片一样,第1张

正确说 it8716f-s 是主板上的一个芯片  并不能代表主板 ,因为有很多主板都用了 这款芯片

这个芯片用于主板 的IO 控制

要知道什么主板  不能光靠一个芯片来识别 ,需要你的主板的全图 或者检测软件 来检测

双D触发器,以下为英文资料复制,希望对你有帮助:)

n SET - RESET CAPABILITY

n STATIC FLIP-FLOP OPERATION - RETAINS

STATE INDEFINITELY WITH CLOCK LEVEL

EITHER "HIGH" OR "LOW"

n MEDIUM SPEED OPERATION 16MHz (TYP)

CLOCK TOGGLE RATE AT 10V

n STANDARDIZED SYMMETRICAL OUTPUT

CHARACTERISTICS

n QUIESCENT CURRENT SPECIFIED UP TO

20V

n 5V, 10V AND 15V PARAMETRIC RATINGS

n INPUT LEAKAGE CURRENT

II = 100nA (MAX) AT VDD = 18V TA = 25°C

n 100% TESTED FOR QUIESCENT CURRENT

n MEETS ALL REQUIREMENTS OF JEDEC

JESD13B " STANDARD SPECIFICATIONS

FOR DESCRIPTION OF B SERIES CMOS

DEVICES"

DESCRIPTION

The HCF4013B is a monolithic integrated circuit

fabricated in Metal Oxide Semiconductor

technology available in DIP and SOP packages

The HCF4013B consists of two identical,

independent data type flip-flops Each flip-flop has

independent data, set, reset, and clock inputs and

Q and Q outputs This device can be used for shift

register applications, and, by connecting Q output

to the data input, for counter and toggle

applications The logic level present at the D input

is transferred to the Q output during the

positive-going transition of the clock pulse Setting

or resetting is independent of the clock and is

accomplished by a high level on the set or reset

line, respectively

HCF4013B

DUAL D-TYPE FLIP FLOP

PIN CONNECTION

ORDER CODES

PACKAGE TUBE T & R

DIP HCF4013BEY

SOP HCF4013BM1 HCF4013M013TR

DIP SOP

HCF4013B

2/9

INPUT EQUIVALENT CIRCUIT

LOGIC DIAGRAM

PIN DESCRIPTION

TRUTH TABLE

X : Don’t Care

D : Low Level

ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur Functional operation under these conditions is

not implied

All voltage values are referred to VSS pin voltage

RECOMMENDED OPERATING CONDITIONS

PIN No SYMBOL NAME AND FUNCTION

3, 11 CLOCK1

CLOCK2

Clock Inputs

4, 10

RESET1

RESET2

Reset Inputs

6, 8 SET1, SET2 Set Inputs

5, 9 D1, D2 Data Inputs

1, 13 Q1, Q2 Data Outputs

2, 12 Q1, Q2 Data Outputs

7 VSS Negative Supply Voltage

14 VDD Positive Supply Voltage

CLOCKD D RESET SET Q Q

L L L L H

H L L H L

X L L Q Q

X X H L L H

X X L H H L

X X H H H H

Symbol Parameter Value Unit

VDD Supply Voltage -05 to +22 V

VI DC Input Voltage -05 to VDD + 05 V

II DC Input Current ± 10 mA

PD Power Dissipation per Package 200 mW

Power Dissipation per Output Transistor 100 mW

Top Operating Temperature -55 to +125 °C

Tstg Storage Temperature -65 to +150 °C

Symbol Parameter Value Unit

VDD Supply Voltage 3 to 20 V

VI Input Voltage 0 to VDD V

Top Operating Temperature -55 to 125 °C

HCF4013B

3/9

DC SPECIFICATIONS

The Noise Margin for both "1" and "0" level is: 1V min with VDD=5V, 2V min with VDD=10V, 25V min with VDD=15V

Symbol Parameter

Test Condition Value

Unit VI

(V)

VO

(V)

|IO|

(mA)

VDD

(V)

TA = 25°C -40 to 85°C -55 to 125°C

Min Typ Max Min Max Min Max

IL Quiescent Current 0/5 5 002 1 30 30

mA

0/10 10 002 2 60 60

0/15 15 002 4 120 120

0/20 20 004 20 600 600

VOH High Level Output

Voltage

0/5 <1 5 495 495 495

V 0/10 <1 10 995 995 995

0/15 <1 15 1495 1495 1495

VOL Low Level Output

Voltage

5/0 <1 5 005 005 005

V 10/0 <1 10 005 005 005

15/0 <1 15 005 005 005

VIH High Level Input

Voltage

05/45 <1 5 35 35 35

V 1/9 <1 10 7 7 7

15/135 <1 15 11 11 11

VIL Low Level Input

Voltage

45/05 <1 5 15 15 15

V 9/1 <1 10 3 3 3

135/15 <1 15 4 4 4

IOH Output Drive

Current

0/5 25 <1 5 -136 -32 -115 -11

mA

0/5 46 <1 5 -044 -1 -036 -036

0/10 95 <1 10 -11 -26 -09 -09

0/15 135 <1 15 -30 -68 -24 -24

IOL Output Sink

Current

0/5 04 <1 5 044 1 036 036

mA 0/10 05 <1 10 11 26 09 09

0/15 15 <1 15 30 68 24 24

II Input Leakage

Current

0/18 Any Input 18 ±10-5 ±01 ±1 ±1 mA

CI Input Capacitance Any Input 5 75 pF

HCF4013B

4/9

DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200KW, tr = tf = 20 ns)

() Typical temperature coefficient for all VDD value is 03 %/°C

(1) Input tr, tf = 5ns

(2) If more than unit is cascaded in a parallel clocked application, tr should be made less than or equal to the sum of the fixed propagation

delay time at 15pF and the transition time of the carry output driving stage for the estimated capacitive load

Symbol Parameter

Test Condition Value () Unit

VDD (V) Min Typ Max

tTLH tTHL Propagation Delay Time

(CLOCK to Q or Q outputs)

5 150 300

ns 10 65 130

15 45 90

tPLH Propagation Delay Time

(SET to Q or RESET to Q)

5 150 300

ns 10 65 130

15 45 90

tPHL Propagation Delay

Time(SET to Q or RESET

to Q)

5 200 400

ns 10 85 170

15 60 120

tTHL tTLH Transition Time 5 100 200

ns 10 50 100

15 40 80

fCL

(1) Maximum Clock Input

Frequency

5 35 7

MHz 10 8 16

15 12 24

tW Clock Pulse Width 5 140 70

ns 10 60 30

15 40 20

tr , tf

(2) Clock Input Rise or Fall

Time

5 15

ms 10 4

15 1

tW Set or Reset Pulse Width 5 180 90

ns 10 80 40

15 50 25

tsetup Data Setup Time 5 40 20

ns 10 20 10

15 15 7

HCF4013B

5/9

TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)

RL = 200KW

RT = ZOUT of pulse generator (typically 50W)

WAVEFORM 1 : CLOCK TO Qn, Qn PROPAGATION DELAY TIMES, Dn TO CLOCK SETUP AND

HOLD TIMES, CLOCK MINIMUM PULSE WITDH, MAXIMUM CLOCK FREQUENCY

(f=1MHz; 50% duty cycle)

HCF4013B

6/9

WAVEFORM 2 : PROPAGATION DELAY TIMES (Qn, Qn TO SET, RESET), MINIMUM PULSE WIDTH

(SET AND RESET) (f=1MHz; 50% duty cycle)

HCF4013B

7/9

DIM

mm inch

MIN TYP MAX MIN TYP MAX

a1 051 0020

B 139 165 0055 0065

b 05 0020

b1 025 0010

D 20 0787

E 85 0335

e 254 0100

e3 1524 0600

F 71 0280

I 51 0201

L 33 0130

Z 127 254 0050 0100

Plastic DIP-14 MECHANICAL DATA

P001A

HCF4013B

8/9

DIM

mm inch

MIN TYP MAX MIN TYP MAX

A 175 0068

a1 01 02 0003 0007

a2 165 0064

b 035 046 0013 0018

b1 019 025 0007 0010

C 05 0019

c1 45° (typ)

D 855 875 0336 0344

E 58 62 0228 0244

e 127 0050

e3 762 0300

F 38 40 0149 0157

G 46 53 0181 0208

L 05 127 0019 0050

M 068 0026

S 8° (max)

SO-14 MECHANICAL DATA

PO13G

HCF4013B

Information furnished is believed to be accurate and reliable However, STMicroelectronics assumes no responsibility for the

consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from

its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics Specifications

mentioned in this publication are subject to change without notice This publication supersedes and replaces all information

previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or

systems without express written approval of STMicroelectronics

© The ST logo is a registered trademark of STMicroelectronics

© 2001 STMicroelectronics - Printed in Italy - All Rights Reserved

STMicroelectronics GROUP OF COMPANIES

Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco

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© >

Nokia8可能没了,还满怀期待的,结果很失望,诺基亚可能从此只活在概念机里面。所以对她不要有啥希望,一个衰落过的公司,是不是我们期望太大了?

诺基亚在巴塞罗那MWC前夕只推出三款全新安卓智能手机,分别是Nokia 6、Nokia 5和Nokia 3这三款破烂,配置低的吓人,可能他们打算把情怀消费到底。诺基亚3310复刻版是一款功能机,只支持2G网络通话和短消息收发,续航能力出色,能连续通话22小时。采用24英寸屏幕,200万像素摄像头,支持最大32GB存储卡容量扩展。支持FM调频收音,MP3播放等功能。上市时间估计在4-6月之间,价格300多。

1、超级输入输出接口芯片

I/O

它一般位于主板的左下方或左上方,主要芯片有Winbond

与ITE,它负责把键盘、鼠标、串口进来的串行数据转化为并行数据。同时也对并口与软驱口的数据进行处理。在我们的维修现场,诸如键盘与鼠标口坏,打印口坏等一些外设不能用,多为I/O芯片坏,有时甚至造成不亮的现象。

2、联阳(ITE)科技编号为IT8712F-A的I/O控制芯片,主要实现硬件监控功能,它将硬件健康状况、风扇转速、CPU核心电压等情况显示在BIOS信息里面,更奇妙的是如果系统温度升高,它会逐步提升风扇速度以降低温度。

3、iTE

IT8712提供了对于LPC设别的支持,还能提供硬件监测的功能,是主板上不可或的确或缺的芯片。

……………………

还有好多,根据芯片号不同,功能也不同

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