VHdl程序！！关于计数和两个时钟信号嵌套使用问题

2.微秒模块采用VHDL语言输入方式，以时钟clk，清零信号clr以及暂停信号STOP为进程敏感变量，程序如下：libraryieeeuseieee.std_logic_1164.alluseieee.std_logic_unsigned.allentityMINSECONDbisport(clk,clrm,stop:instd_logic----时钟/清零信号secm1,secm0:outstd_logic_vector(3downto0)----秒高位/低位co:outstd_logic)-------输出/进位信号endMINSECONDbarchitectureSECofMINSECONDbissignalclk1,DOUT2:std_logicbeginprocess(clk,clrm)variablecnt1,cnt0:std_logic_vector(3downto0)---计数VARIABLECOUNT2:INTEGERRANGE0TO10beginIFCLK'EVENTANDCLK='1'THENIFCOUNT2>=0ANDCOUNT2="111")thencountdaoutdaoutdaoutdaoutdaoutdaoutdaoutdaoutqqqqqqqqqq<="1101111"--显示9endcaseendprocessenddisp_are

LIBRARY IEEE

USE IEEE.STD_LOGIC_1164.ALL

USE IEEE.STD_LOGIC_UNSIGNED.ALL

ENTITY CNT60 IS

PORT(CH,CLK,EN:IN STD_LOGIC

DOUT:OUT STD_LOGIC_VECTOR(5 DOWNTO 0)

COUT:OUT STD_LOGIC)

END ENTITY CNT60

ARCHITECTURE ONE OF CNT60 IS

BEGIN

PROCESS(CLK,EN,CH)

VARIABLE dd: STD_LOGIC_VECTOR(5 DOWNTO 0)

BEGIN

IF CLK'EVENT AND CLK='1' THEN

IF EN='1' THEN

IF CH='1' THEN

IF dd<60 THEN dd:=dd+1

ELSE dd:="000000"

END IF

IF dd=60 THEN COUT<='1'

ELSE COUT<='0'

END IF

ELSE IF dd>0 THEN dd:=dd-1

ELSE dd:="111100"

END IF

IF dd=0 THEN COUT<='1'

ELSE COUT<='0'

END IF

END IF

END IF

END IF

DOUT<=dd

END PROCESS

END ARCHITECTURE ONE

--EN为使能信号，高电平有效，CH可以选择，为1时进行加，为0时进行减。

这是60进制：

LIBRARY IEEE

USE IEEE.STD_LOGIC_1164.ALL

USE IEEE.STD_LOGIC_UNSIGNED.ALL

ENTITY CNT10 IS

PORT (CLK,RST,EN : IN STD_LOGIC

CQ : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)

COUT : OUT STD_LOGIC )

END CNT10

ARCHITECTURE behav OF CNT10 IS

BEGIN

PROCESS(CLK, RST, EN)

VARIABLE CQI : STD_LOGIC_VECTOR(3 DOWNTO 0)

BEGIN

IF RST = '1' THEN CQI := (OTHERS =>'0') --计数器异步复位

ELSIF CLK'EVENT AND CLK='1' THEN --检测时钟上升沿

IF EN = '1' THEN--检测是否允许计数（同步使能）

IF CQI <9 THEN CQI := CQI + 1 --允许计数, 检测是否小于9

ELSECQI := (OTHERS =>'0') --大于9，计数值清零

END IF

END IF

END IF

IF CLK'EVENT AND CLK='1' THEN

IF CQI = 9 THEN COUT <= '1' --计数大于9，输出进位信号

ELSECOUT <= '0'

END IF

END IF

CQ <= CQI --将计数值向端口输出

END PROCESS

END behav

LIBRARY IEEE

USE IEEE.STD_LOGIC_1164.ALL

USE IEEE.STD_LOGIC_UNSIGNED.ALL

ENTITY CNT6 IS

PORT (CLK1,RST1,EN1 : IN STD_LOGIC

CQ1: OUT STD_LOGIC_VECTOR(2 DOWNTO 0)

COUT1 : OUT STD_LOGIC )

END CNT6

ARCHITECTURE behav OF CNT6 IS

BEGIN

PROCESS(CLK1, RST1, EN1)

VARIABLE CQI : STD_LOGIC_VECTOR(2 DOWNTO 0)

BEGIN

IF RST1 = '1' THEN CQI := (OTHERS =>'0') --计数器异步复位

ELSIF CLK1'EVENT AND CLK1='1' THEN --检测时钟上升沿

IF EN1 = '1' THEN--检测是否允许计数（同步使能）

IF CQI <5 THEN CQI := CQI + 1 --允许计数, 检测是否小于5

ELSECQI := (OTHERS =>'0') --大于5，计数值清零 END IF

END IF

END IF

IFCLK1'EVENT AND CLK1='1' THEN

IF CQI = 5 THENCOUT1 <= '1' --计数大于5，输出进位信号

ELSECOUT1 <= '0'

END IF

END IF

CQ1 <= CQI --将计数值向端口输出

END PROCESS

END behav

LIBRARY IEEE

USE IEEE.STD_LOGIC_1164.ALL

ENTITY CNT60 IS

PORT ( CLK0,RST0,EN0 : IN STD_LOGIC

COUT2: OUT STD_LOGIC

LED1 : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)

LED2 : OUT STD_LOGIC_VECTOR(2 DOWNTO 0) )

END

ARCHITECTURE one OF CNT60 IS

COMPONENT CNT10

PORT (CLK,RST,EN : IN STD_LOGIC

CQ : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)

COUT : OUT STD_LOGIC )

END COMPONENT

COMPONENT CNT6

PORT (CLK1,RST1,EN1 : IN STD_LOGIC

CQ1: OUT STD_LOGIC_VECTOR(2 DOWNTO 0)

COUT1 : OUT STD_LOGIC )

END COMPONENT

SIGNAL COUT0:STD_LOGIC

BEGIN

u1:CNT10 PORT MAP

(CLK=>CLK0,

RST=>RST0,

EN=>EN0,

COUT=>COUT0,

CQ=>LED1)

u2:CNT6 PORT MAP

(CLK1=>COUT0,

RST1=>RST0,

EN1=>EN0,

COUT1=>COUT2,

CQ1=>LED2)

END ARCHITECTURE one

这是12进制：

LIBRARY IEEE

use IEEE.STD_LOGIC_1164.ALL

USE IEEE.STD_LOGIC_UNSIGNED.ALL

ENTITY CNT12 IS

PORT(clk9,reset,en9:IN STD_LOGIC

daout:out STD_LOGIC_VECTOR(5 DOWNTO 0))

END ENTITY CNT12

ARCHITECTURE fun OF CNT12 IS

SIGNAL count:STD_LOGIC_VECTOR(5 DOWNTO 0)

BEGIN

daout<=count

PROCESS(clk9,reset,en9)

BEGIN

IF(reset='1')THEN count<="000000"--若reset=1，则异步清零

ELSIF(clk9'event and clk9='1')THEN --否则，若clk上升沿到

IF en9='1' THEN

IF(count(3 DOWNTO 0)="1001")THEN --若个位计时恰好到"1001"即

IF(count<16#11#)THEN--11进制

count<=count+7 --若到11D则

else

count<="000000" --复0

END IF

ELSIF (count<16#11#)THEN--若未到11D，则count进1

count<=count+1

ELSE --否则清零

count<="000000"

END IF

END IF --END IF（count（3 DOWNTO 0）="1001"）

END IF --END IF（reset='1'）

END PROCESS

END fun

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