计算机硬件描述语言(VHDL)与编程语言（C语言）的区别及关系，

首先说VHDL：它是描述电路的计算机工具，早期的CPLD等器件是基于与-或阵列的，更容易说明这点，VHDL是描述电路行为的，当下载到器件后，它就是具体的电路，这个电路全由与-或阵列组成。后期的FPGA也一样，只是它是基于查找表的。再说C语言：我们可以认为它是用于控制特定电路的工作。我们都知道可以C编程的控制器都有程序存储器，它里面就存放了C编译后的二进制代码。而VHDL里下载后根本就不需要这个存放程序的地方。

实体，结构体，库，程序包，配置

1、实体：用于描述所设计系统的外部接口特性；即该设计实体对外的输入、输出端口数量和端口特性。

2、结构体：用于描述实体所代表的系统内部的结构和行为；它描述设计实体的结构、行为、元件及内部连接关系。

3、库：存放已经编译的实体、构造体、程序包集合和配置。

4、程序包：存放各设计模块可以共享的数据类型、常数、子程序库。

5、配置;实体对应多个结构体时，从与某个实体对应的多个结构体中选定一个作为具体实现。

c语言是用来编写计算机程序，应用程序的，当然扩展的c语言有用于单片机等与有关的程序。vhdl语言是与电子技术相关EDA电路设计相关的用于描述数字系统的结构，行为，功能和接口的硬件描述语言

1 the VHDL English full name is Very-High-Speed Integrated Circuit HardwareDescription Language, was born in 1982 at the end of 1987, VHDL revealed firmly by IEEE and the United States Department of Defense the standard hardware description language Announced the VHDL standard edition from IEEE, after IEEE-1076 (ie 87 editions), each EDA Corporation has promoted own VHDL design environment one after another, or announces own design tool to be possible with the VHDL connection Hereafter VHDL obtained widespread acceptance in the electronic design domain, and has substituted for the original non-standard hardware description language gradually in 1993, IEEE has carried on the revision to VHDL, expands VHDL from a higher abstract level and the system descriptive power the content, announced new edition VHDL, namely IEEE standard 1076-1993 editions, (ie 93 editions) Now, VHDL and Verilog take IEEE the industrial standard hardware description language, also has the numerous EDA Corporation's support, in the electronic engineering domain, has become the general hardware description language in fact Some experts believed that in the new century, VHDL will undertake the majority of number system task of design in the Verilog language VHDL mainly uses in describing number system's structure, the behavior, the function and the connection Besides includes many have the hardware characteristic sentence, the VHDL language form and the description style and the syntax are similar to the common computer higher order language The VHDL program structure characteristic is an engineering design, or said that the design entity (may be a part, exterior an electric circuit module either a system) divide into (or called, but part, and port) and the interior (or calls invisible part), also involves the entity the internal function and the algorithm completes the part In has defined the external interface after a design entity, once after its internal development completes, other designs may transfer this entity directly Inside and outside this kind will design the entity to divide into a part of concept will be the VHDL system design fundamental point 2 EDA is the electronic design automation (Electronic Design Automation) abbreviation, in the early-1990s from computer-aided design (CAD), computer auxiliary manufacture (CAM), computer auxiliary test (CAT) and computer off-set utilities (CAE) the concept development comes The EDA technology is take the computer as the tool, the designer in the EDA software platform, completes the design document with hardware description language HDL, then completes the logical translation, the simplification, the division, the synthesis, the optimization, the layout, the wiring and the simulation automatically by the computer, until regarding specific goal work and so on chip adaptive translation, logical mapping and programming downloading The EDA technology's appearance, raised the circuit design efficiency and the reliability enormously, reduced designer's labor intensity

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