急！verilog编写的交通灯

建议使用三段状态机描述，可以避免毛刺的出现，代码如下（已经编译通过）

module traffic(clk,rst,b,L0,L1,L2,L3);

input clk,rst,b;

output L0,L1,L2,L3;

reg l0,l1,l2,l3;

parameter S0 = 2'b00;

parameter S1 = 2'b01;

parameter S2 = 2'b10;

parameter S3 = 2'b11;

reg [1:0] counter;

reg [1:0] cs,ns;

reg b_req;

always@(posedge clk or posedge rst) begin

if(rst) b_req <= 1'b0;

else if(b)

b_req <= 1'b1;

end

always@(posedge clk or posedge rst)begin

if(rst)begin

counter <= 2'b0;

end

else begin

counter <= counter + 1'b1;

end

end

always@(posedge clk or posedge rst)begin

if(rst) begin

cs <= S0;

end

else begin

cs <= ns;

end

end

always@(b or b_req or cs or rst or counter)

begin

ns = 2'bx;

case(cs)

S0: begin

if(counter == 2'b11)begin

if(b_req) ns = S2;

else ns = S1;

end

else

ns = S0;

end

S1: begin

if(counter == 2'b11)begin

if(b_req) ns = S3;

else ns = S0;

end

else

ns = S1;

end

S2: begin

if(counter == 2'b11)

ns = S1;

else

ns = S2;

end

S3: begin

if(counter == 2'b11)

ns = S0;

else

ns = S3;

end

default:;

endcase

end

always@(posedge clk or posedge rst)begin

if(rst)begin

l0 <= 1'b0;

l1 <= 1'b0;

l2 <= 1'b0;

l3 <= 1'b0;

end

else begin

case(ns)

S0: begin

b_req <= 1'b0;

l0 <= 1'b1;

l1 <= 1'b0;

l2 <= 1'b0;

l3 <= 1'b1;

end

S1: begin

b_req <= 1'b0;

l0 <= 1'b0;

l1 <= 1'b1;

l2 <= 1'b1;

l3 <= 1'b0;

end

S2: begin

l0 <= 1'b0;

l1 <= 1'b1;

l2 <= 1'b0;

l3 <= 1'b1;

end

S3: begin

l0 <= 1'b0;

l1 <= 1'b1;

l2 <= 1'b0;

l3 <= 1'b1;

end

default:;

endcase

end

end

assign L0 = l0;

assign L1 = l1;

assign L2 = l2;

assign L3 = l3;

endmodule

不知道reset的要求，随便写了一个reset

别的应该问题不大，可能3秒还是4秒会有点问题

水平有限，请指正

1

TimerH是十位，TimerL是个位，从0记到69

Ty Ts Tl可能是红黄绿灯要变化的标志

2

0:SEGH=8'b10111110是带小数点的七段显示数码管的显示码

我给你写了一个代码，没有仿真，里面有简单注释，要是调试出了什么问题或者看不懂可以继续追问，如果没问题请采纳！

module LED

(

input clk_33,

input reset_n,

input switch,

output led_red,

output led_yellow,

output led_bule

);

// 假设PWM的频率为1k：T = 1/1k = 1ms;

// 这个频率可以根据你自己的需要设定然后修改num和t的值即可，不过要注意将相关寄存器的位数做对应修改

// 将1ms再分为256个份，每一份：t = T/256 = 39us；

// 以33MHz时钟产生39us的定时：N = 3910E(-6)/(1/33000000) = 1287，取129；

// ==============================

parameter t = 8'd128;

parameter num = 8'd255;

// ==============================

reg [1:0] i;//0:等待用户按键；1:等待完成信号，切换至状态0；

reg  iscount;//开始计数信号

reg  isdone;//完成信号

// --- --- ---

always @ ( posedge clk_33 or negedge reset_n )

if( !reset_n )

begin

i <= 1'b0;

iscount <= 1'b0;

end

else

case( i )

2'd0:

if( switch )

begin

i <= i + 1'b1;

iscount <= 1'b1;

end

else

begin

i <= i;

iscount <= iscount;

end

2'd1:

if( isdone )

begin

i <= 2'd0;

iscount <= 1'b0;

end

else

begin

i <= i;

iscount <= iscount;

end

endcase

// ==============================

reg [7:0] count1;//产生39us

// --- --- ---

always @ ( posedge clk_33 or negedge reset_n )

if( !reset_n )

count1 <= 8'd0;

else if( iscount )

count1 <= count1 + 1'b1;

else if( count1 == t )

count1 <= 8'd0;

else

count1 <= 8'd0;

// ==============================

reg [7:0] count2;//产生1ms

reg [8:0] length;//控制PWM中高电平的时间

reg [1:0] step;//0:等待开始信号；1:渐亮；2:渐暗；3:切换至状态0等待开始信号

// --- --- ---

always @ ( posedge clk_33 or negedge reset_n )

if( !reset_n )

begin

count2 <= 8'd0;

length <= 9'd1;

step <= 2'd0;

isdone <= 1'b0;

end

else

case( step )

2'd0:

if( iscount )

step <= step + 1'b1;

else

step <= step;

2'd1:

if( count2 == 8'd255 )

begin

if( length == 8'd255 )

begin

length <= length - 1'b1;

count2 <= 8'd0;

step <= step + 1'b1;

end

else

begin

length <= length + 1'b1;

count2 <= 8'd0;

end

end

else if( count1 == t )

count2 <= count2 + 1'b1;

else ;

2'd2:

if( count2 == 8'd255 )

begin

if( length == 8'd0)

begin

step <= step + 1'b1;

count2 <= 8'd0;

isdone <= 1'b1;

end

else

begin

length <= length - 1'b1;

count2 <= 8'd0;

end

end

else if( count1 == t )

count2 <= count2 + 1'b1;

else ;

2'd3:

begin

isdone <= 1'b0;

step <= 2'd0;

end

endcase

// ==============================

assign led_red = ( length > count2 ) 1'b1 : 1'b0;

assign led_yellow = ( length > count2 ) 1'b1 : 1'b0;

assign led_bule = ( length > count2 ) 1'b1 : 1'b0;

// ==============================

endmodule

按键低电平有效，led灯低电平时亮。按键按下亮，松开灭。程序较简单，为组合逻辑电路，没有按键防抖功能。

module

led(led,key);

input

key;

output

led;

reg

led_out;

always@(key)

if(!key)

led_out=1'b0;

else

led_out=1'b1;

assign

led=led_

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