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DS31256 -- T3E3 MUXDS3112 Ha
Abstract: ApplicaTIon Note 3344 shows how to configure the hardware connecTIons that can be uTIlized
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DS31256 Unchannelized T3E3HS
Abstract: This applicaTIon note provides an example of how to configure a single T3E3HSSIVDSL por
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DS31256的初始化步骤
摘要:DS31256 Envoy HDLC控制器在发送数据包之前的初始化顺序。 概述按照设计,DS31256上电以后不会控制PCI总线。所有的物理端口(端口0至15)发送全1 (非HDLC空闲码),
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DS31256的PCI总线利用率
要:本应用笔记说明了如何计算DS31256 HDLC控制器的总线带宽。并展示了一个实验室实测的结果。同时演示了一个总线利用率速算表,该速算表如果需要可以索要。 概述DS31256 HDLC控制器通过
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DS31256 Gapped Clock Applicati
Abstract: This applicaTIon note discusses how to realize gapped clock applicaTIons with the DS31256
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Enabling Fractional-T1(FT1) Lo
Abstract: This applicaTIon note provides the operaTIonal algorithm and coding examples to use the re
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DS31256 HDLC Controller Step-b
Abstract: This applicaTIon note provides an example of how to configure a single T1 port on DS31256
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Internal Test Registers for th
Abstract: This applicaTIon note lists the internal test registers in DS31256 HDLC Controller, and ex
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DS31256 Loopback Modes
Abstract: This applicaTIon note shows how to configure various loopback modes of the DS31256 HDLC co