IntroducTIonThis applicaTIon note provides the register settings for the DS2148/DS21348/DS21Q48/DS213Q48 and DS21448 to configure the transmitter for pulse amplitudes that are different than the line build-out (LBO) modes documented in the respective data sheets. The following tables list the register settings and define the resulting pulse amplitudes for the 3.3V (DS21348, DS21Q348) and 5V (DS2148, DS21Q48) devices.
Table 1. DS21348, DS21Q348 Register Settings
Operating Voltage: 3.3V (VSM pin wired low)
Applicable Devices: DS21348, DS21Q348
Applicable Device Revisions: A2, B1, C1, and C2 (DS21Q348)
Operating Mode: E1
(CCR4.7) L1
(CCR4.6) L0
(CCR4.5) APPLICATION TYPICAL CHANGE IN
PULSE AMPLITUDE RETURN
LOSS (dB) Rt (Ω)
Table 2. DS2148, DS21Q48 Register Settings
Operating Voltage: 5V (VSM pin wired high)
Applicable Devices: DS2148, DS21Q48
Applicable Device Revisions: A2, B1, C1 and C2 (DS21Q48)
Operating Mode: E1
(CCR4.7) L1
(CCR4.6) L0
(CCR4.5) APPLICATION TYPICAL CHANGE IN
PULSE AMPLITUDE RETURN
LOSS (dB) Rt (Ω)
In addition to the these settings, additional pulse amplitudes can be obtained in the following devices by setting test register 2 (Address 14h) as per Table 3.
Table 3. Additional Pulse Amplitude Settings
PULSE AMPLITUDE
In addition to the above settings, writing a HEX BO in address 14h (register TEST2) reduces any tendency of the waveform to ring.
To learn more about testing Dallas Semiconductor line interface units and transceivers for compliance to T1/J1 and E1 pulse mask specifications, refer to Application Note 397: Pulse Template Measurement
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